read_aiger - read AIGER file

    read_aiger [options] [filename]

Load module from an AIGER file into the current design.

    -module_name <module_name>
        Name of module to be created (default: <filename>)

    -clk_name <wire_name>
        AIGER latches to be transformed into posedge DFFs clocked by wire of        this name (default: clk)